Procesamiento Paralelo de 2 FPGAs para Control y Aplicaciones Autotrónicas.
DOI:
https://doi.org/10.56913/teceo.6.12.193-205Palabras clave:
FPGA, procesamiento paralelo, control autotrónico, ESP32, VHDLResumen
El presente estudio analiza la implementación de un sistema de procesamiento paralelo utilizando dos FPGAs en aplicaciones de control autotrónico. Tradicionalmente, los sistemas de control automotriz enfrentan limitaciones debido a la capacidad de una sola FPGA para procesar grandes volúmenes de datos en tiempo real. Para superar estas limitaciones, se ha desarrollado un sistema que emplea dos FPGAs en paralelo, logrando una mejora significativa en la eficiencia y capacidad de procesamiento. La metodología utilizada incluye la programación en VHDL, la comunicación entre FPGAs y el uso de una ESP32 para medir el tiempo de procesamiento. Los resultados indican una reducción del 50% en el tiempo de lectura de datos, lo que representa un avance crucial en la eficiencia de los sistemas de control automotriz avanzados.Citas
Adil Yazdeen, A., Zeebaree, S. R. M., Mohammed Sadeeq, M., Kak, S. F., Ahmed, O. M., & Zebari, R. R. (2021). FPGA Implementations for Data Encryption and Decryption via Concurrent and Parallel Computation: A Review. Qubahan Academic Journal, 1(2), 8–16. https://doi.org/10.48161/qaj.v1n2a38
Altera Cyclone IV EP4CE15F23C8N. (s/f). FPGA Cookbook. Recuperado el 11 de octubre de 2024, de https://www.fpga-cookbook.com/altera-development-boards/altery-cyclone-iv-ep4ce15f23c8n/
Altera, I. N. C. (2014). Cyclone IV Device Handbook. En 2010-12-01)[2012-05-16]. Http://www. Altera, com.
Bell, C. (2020). Programming in MicroPython. En C. Bell (Ed.), Beginning Sensor Networks with XBee, Raspberry Pi, and Arduino: Sensing the World with Python and MicroPython (pp. 103–142). Apress. https://doi.org/10.1007/978-1-4842-5796-8_3
Bosse, S. (2022). VNetOS: Virtualised Distributed and Parallel Sensor Network Operating Environment for the IoT and SHM. Engineering Proceedings, 27(1), Article 1. https://doi.org/10.3390/ecsa-9-13212
C. S., A. K., S., P. B., & Kumar, K. J. (2016). Design and Development of High-speed Data Acquisition System with Cyclone FPGA. Proceedings of the 7th International Conference on Computing Communication and Networking Technologies, 1–5. https://doi.org/10.1145/2967878.2967896
Cabanes, Q., Senouci, B., & Ramdane-Cherif, A. (2019). A Complete Multi-CPU/FPGA-based Design and Prototyping Methodology for Autonomous Vehicles: Multiple Object Detection and Recognition Case Study. 2019 International Conference on Artificial Intelligence in Information and Communication (ICAIIC), 158–163. https://doi.org/10.1109/ICAIIC.2019.8669047
Cao, Y., Guo, S., Jiang, S., Zhou, X., Wang, X., Luo, Y., Yu, Z., Zhang, Z., & Deng, Y. (2022). Parallel Optimisation and Implementation of a Real-Time Back Projection (BP) Algorithm for SAR Based on FPGA. Sensors, 22(6), 2292. https://doi.org/10.3390/s22062292
Cesarano, G. (2018). FPGA Implementation of a Deep Learning Inference Accelerator for Autonomous vehicles [Laurea, Politecnico di Torino]. https://webthesis.biblio.polito.it/9033/
Dias, L. A., Ferreira, J. C., & Fernandes, M. A. C. (2020). Parallel Implementation of K-Means Algorithm on FPGA. IEEE Access, 8, 41071–41084. https://doi.org/10.1109/ACCESS.2020.2976900
Ghielmetti, N., Loncar, V., Pierini, M., Roed, M., Summers, S., Aarrestad, T., Petersson, C., Linander, H., Ngadiuba, J., Lin, K., & Harris, P. (2022). Real-time semantic segmentation on FPGAs for autonomous vehicles with hls4ml. Machine Learning: Science and Technology, 3(4), 045011. https://doi.org/10.1088/2632-2153/ac9cb5
Guo, K., Sui, L., Qiu, J., Yao, S., Han, S., Wang, Y., & Yang, H. (2016). From model to FPGA: Software-hardware co-design for efficient neural network acceleration. 2016 IEEE Hot Chips 28 Symposium (HCS), 1–27. https://doi.org/10.1109/HOTCHIPS.2016.7936208
Hao, C., Sarwari, A., Jin, Z., Abu-Haimed, H., Sew, D., Li, Y., Liu, X., Wu, B., Fu, D., Gu, J., & Chen, D. (2019). A Hybrid GPU + FPGA System Design for Autonomous Driving Cars. 2019 IEEE International Workshop on Signal Processing Systems (SiPS), 121–126. https://doi.org/10.1109/SiPS47522.2019.9020540
Hasegawa, K., Takasaki, K., Nishizawa, M., Ishikawa, R., Kawamura, K., & Togawa, N. (2019). Implementation of a ROS-Based Autonomous Vehicle on an FPGA Board. 2019 International Conference on Field-Programmable Technology (ICFPT), 457–460. https://doi.org/10.1109/ICFPT47387.2019.00092
Hronek, P. (2023). CAN Bus Latency Test Automation for Continuous Testing and Evaluation. https://support.dce.felk.cvut.cz/mediawiki/images/0/0a/Bp_2023_hronek_pavel.pdf
Huang, Z., Yu, Q., & Dong, H. (2024). The study of remote online upgrade method for FPGA based on CAN bus. International Conference on Optoelectronic Information and Computer Engineering (OICE 2024), 13255, 55–60. https://doi.org/10.1117/12.3040242
Humaidi, A. J., Hasan, S., & Fadhel, M. A. (2018). FPGA-Based Lane-Detection Architecture for autonomous vehicles: A real-time design and development. ASIA LIFE SCIENCES.
Kasem, A., Reda, A., Vásárhelyi, J., & Bouzid, A. (2021). A Survey about Intelligent Solutions for Autonomous Vehicles based on FPGA. Carpathian Journal of Electronic & Computer Engineering, 13(2). https://search.ebscohost.com/login.aspx?direct=true&profile=ehost&scope=site&authtype=crawler&jrnl=18449689&AN=148608132&h=CUXRsUGA8MDVO6GH9l5prTUl%2BwO%2F53T4xcqsQO3r4wJ7C0y5J7382tlEyerpcB6cVo7o0ikBVEJxYIZo1cJmSg%3D%3D&crl=c
Kastner, R., Matai, J., & Neuendorffer, S. (2018). Parallel Programming for FPGAs (No. arXiv:1805.03648). arXiv. https://doi.org/10.48550/arXiv.1805.03648
Kojima, A., & Nose, Y. (2018). Development of an Autonomous Driving Robot Car Using FPGA. 2018 International Conference on Field-Programmable Technology (FPT), 411–414. https://doi.org/10.1109/FPT.2018.00087
Li, Y., Li, S. E., Jia, X., Zeng, S., & Wang, Y. (2022). FPGA accelerated model predictive control for autonomous driving. Journal of Intelligent and Connected Vehicles, 5(2), 63–71. Journal of Intelligent and Connected Vehicles. https://doi.org/10.1108/JICV-03-2021-0002
Mueller, R., Teubner, J., & Alonso, G. (2009). Data processing on FPGAs. Proc. VLDB Endow., 2(1), 910–921. https://doi.org/10.14778/1687627.1687730
Nesbø, S. V., Alme, J., Bonora, M., Ersdal, M. R., Giubilato, P., Helstrup, H., Lupi, M., Rinella, G. A., Røhrich, D., & Schambach, J. (2020). Implementation of a CAN bus interface for the Detector Control System in the ALICE ITS Upgrade. https://bora.uib.no/bora-xmlui/handle/11250/2758211
Nikolov, N., & Gotseva, D. (2024). Make a Prototype of IoT Connected Diagnostic Tool Using Esp32 and MQTT for Reading Data from Car CAN Bus OBD2. 2024 59th International Scientific Conference on Information, Communication and Energy Systems and Technologies (ICEST), 1–4. https://doi.org/10.1109/ICEST62335.2024.10639614
Nur-A-Alam, Ahsan, M., Based, M. A., Haider, J., & Rodrigues, E. M. G. (2021). Smart Monitoring and Controlling of Appliances Using LoRa Based IoT System. Designs, 5(1), Article 1. https://doi.org/10.3390/designs5010017
Pawar, R. (2022). Implementation of CAN on FPGA for Security Evaluation Purpose. https://www.academia.edu/download/95477386/IRJET_V9I1188.pdf
Pham, N. N., Leuchter, J., Pham, K. L., & Dong, Q. H. (2022). Battery Management System for Unmanned Electric Vehicles with CAN BUS and Internet of Things. Vehicles, 4(3), Article 3. https://doi.org/10.3390/vehicles4030037
Rodríguez, A., Navarro, A., Asenjo, R., Corbera, F., Gran, R., Suárez, D., & Nunez-Yanez, J. (2020). Parallel multiprocessing and scheduling on the heterogeneous Xeon+FPGA platform. The Journal of Supercomputing, 76(6), 4645–4665. https://doi.org/10.1007/s11227-019-02935-1
Seng, K. P., Lee, P. J., & Ang, L. M. (2021). Embedded Intelligence on FPGA: Survey, Applications and Challenges. Electronics, 10(8), 895. https://doi.org/10.3390/electronics10080895
Shen, H., Feng, Y., & Tan, G. (2011). Research on time synchronization of Class B LXI bus. 112–116. https://doi.org/10.1049/cp.2011.0858
Shen, M., Luo, G., & Xiao, N. (2021). Combining Static and Dynamic Load Balance in Parallel Routing for FPGAs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 40(9), 1850–1863. https://doi.org/10.1109/TCAD.2020.3031259
Shen, M., & Xiao, N. (2020). Towards Serial-Equivalent Multi-Core Parallel Routing for FPGAs. 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1139–1144. https://doi.org/10.23919/DATE48585.2020.9116313
Shimiao, C., Dashuang, Y., Shuyan, N., & Ke, Z. (2020). Design and Implementation of Microsatellite CAN Bus Communication. 2020 7th International Conference on Information Science and Control Engineering (ICISCE), 2354–2360. https://ieeexplore.ieee.org/abstract/document/9532114/
Stojilović, M. (2017). Parallel FPGA routing: Survey and challenges. 2017 27th International Conference on Field Programmable Logic and Applications (FPL), 1–8. https://doi.org/10.23919/FPL.2017.8056782
Wei, K., Honda, K., & Amano, H. (2018). FPGA Design for Autonomous Vehicle Driving Using Binarized Neural Networks. 2018 International Conference on Field-Programmable Technology (FPT), 425–428. https://doi.org/10.1109/FPT.2018.00091
www.alldatasheet.com. (s/f). EP4CE15F23C8N datasheet(4/14 Pages) ALTERA. Recuperado el 11 de octubre de 2024, de http://www.alldatasheet.com/html-pdf/536408/ALTERA/EP4CE15F23C8N/906/4/EP4CE15F23C8N.html
Yang, H. J., Fan, H., & Dong, H. G. (2014). Design and Implementation of a RISC Processor on FPGA. Advanced Materials Research, 981, 58–61. https://doi.org/10.4028/www.scientific.net/AMR.981.58
Zhang, Y. Y., Zhang, L., Shang, Z. Q., Su, Y. R., Wu, Z., & Yan, F. B. (2022). A New Multichannel Parallel Real-time FFT Algorithm for a Solar Radio Observation System Based on FPGA. Publications of the Astronomical Society of the Pacific, 134(1033), 034502. https://doi.org/10.1088/1538-3873/ac5212
Archivos adicionales
Publicado
Cómo citar
Número
Sección
Licencia
Derechos de autor 2024 Tecnología, Ciencia y Estudios Organizacionales
Esta obra está bajo una licencia internacional Creative Commons Atribución-NoComercial-CompartirIgual 4.0.
